Date of Award
Doctor of Philosophy (PhD)
Micro and Nanoscale Systems
The objective of this work is to fabricate microelectronic devices and circuits based on organic and polymer materials by micro fabrication techniques.
The organic microelectronic device is one of the most promising alternative to traditional inorganic devices due to its varieties of advantages, such as low-cost, large area (e.g. for display), and distinguished mechanical property (insensitive to mechanical deformation). For practical applications, it is necessary to reduce the fabrication cost as well as to improve the device's performance. In this work several fabrication processes have been developed to build organic diodes, field-effect transistors (FETs) and circuits.
Simple spin coating and reactive ion etching (RIE) techniques were used to fabricate the polymer-based Schottky diode and the organic diodes. The Schottky barrier height, breakdown voltage, and rectification ratio of Aluminum/(Poly-3,4-ethylenedioxythiophene/poly-styrenesulfonate) (PEDT/PSS) Schottky diode are about 0.97 eV, 5.5 V, and 1.3 × 10 4, respectively. The breakdown voltages are about 9 V, and the rectification ratios are in excess of 4.1 × 103 for both Polypyrrole/1,4,5,8-naphthalene-tetracarboxylic-dianhydride (NTCDA) and (PEDT/PSS)/NTCDA diodes.
Due to the excellent electrical conductivity, solution processability, and stability of PEDT/PSS, PEDT/PSS FETs have been investigated and fabricated with the low-cost fabrication processes of spin coating and RIE using an aluminum film as the pattern mask. PEDT/PSS FET with low-resistivity silicon as the gate has a field-effect mobility as high as 0.8 cm2/Vs and a threshold voltage of 17 V. All-organic FET has a field-effect mobility of 1.04 × 10−3 cm2/Vs and a threshold voltage of −13.3 V.
Using thermal oxide and self-assembled silica nanoparticle as the gate dielectrics, pentacene FETs were fabricated and investigated. Temperature-dependence of field effect mobility and threshold voltage was studied in the range of 300∼400 K. Being a low-cost and low-temperature process, layer-by-layer self-assembly technique has been used to form the gate dielectric as an alternative insulator of silicon dioxide to fabricate pentacene FETs. An approach to promote device mobility has also been studied. Moreover, dual-gate pentacene FETs were fabricated as a new device structure with good performance. A simple inverter circuit integrated with a pentacene FET and an ink jet printed polymer resistor has been fabricated and tested.
Liang, Guirong, "" (2003). Dissertation. 660.